Invention Grant
US08176240B2 Method and apparatus for reducing power consumption in a memory bus interface by selectively disabling and enabling sense amplifiers
有权
用于通过选择性地禁用和启用读出放大器来减少存储器总线接口中的功耗的方法和装置
- Patent Title: Method and apparatus for reducing power consumption in a memory bus interface by selectively disabling and enabling sense amplifiers
- Patent Title (中): 用于通过选择性地禁用和启用读出放大器来减少存储器总线接口中的功耗的方法和装置
-
Application No.: US11354304Application Date: 2006-02-14
-
Publication No.: US08176240B2Publication Date: 2012-05-08
- Inventor: Jeffrey R. Wilcox , Noam Yosef
- Applicant: Jeffrey R. Wilcox , Noam Yosef
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Trop, Pruner & Hu, P.C.
- Main IPC: G06F12/00
- IPC: G06F12/00
Abstract:
A technique includes amplifying data signals from a memory bus interface. The amplified data signals are sampled, and the amplifier is selectively disabled in response to the absence of a predetermined operation occurring over the memory bus. In some embodiments of the invention, the amplification may be selectively enabled in response to the beginning of the predetermined operation over the memory bus.
Public/Granted literature
Information query
