Invention Grant
US08176257B2 Cache used both as cache and staging buffer 有权
缓存用作缓存和分段缓冲区

Cache used both as cache and staging buffer
Abstract:
In one embodiment, a cache comprises a data memory comprising a plurality of data entries, each data entry having capacity to store a cache block of data, and a cache control unit coupled to the data memory. The cache control unit is configured to dynamically allocate a given data entry in the data memory to store a cache block being cached or to store data that is not being cache but is being staged for retransmission on an interface to which the cache is coupled.
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