Invention Grant
US08176460B2 Method of optimizing ESD protection for an IC, an ESD protection optimizer and an ESD protection optimization system 有权
优化IC的ESD保护方法,ESD保护优化器和ESD保护优化系统

Method of optimizing ESD protection for an IC, an ESD protection optimizer and an ESD protection optimization system
Abstract:
An ESD protection optimizer, a method of optimizing ESD protection for an IC and an ESD protection optimization system is disclosed. In one embodiment, the ESD protection optimizer includes: (1) a circuit analyzer configured to identify ESD cells and circuitry of the IC by comparing component information of the IC with predefined ESD protection elements and predefined circuit topologies and (2) an ESD resistance determiner configured to calculate a resistance value to couple in series with the circuitry, the resistance value based on protection cell physical attributes associated with the identified ESD cells and circuitry physical attributes associated with the identified circuitry.
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