Invention Grant
- Patent Title: Pattern forming method, manufacturing method of semiconductor device, and template manufacturing method
- Patent Title (中): 图案形成方法，半导体器件的制造方法和模板制造方法
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Application No.: US13015351Application Date: 2011-01-27
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Publication No.: US08178366B2Publication Date: 2012-05-15
- Inventor: Seiro Miyoshi , Hidefumi Mukai , Takeshi Koshiba
- Applicant: Seiro Miyoshi , Hidefumi Mukai , Takeshi Koshiba
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Finnegan, Henderson, Farabow, Garrett & Dunner, L.L.P.
- Priority: JP2010-129292 20100604
- Main IPC: H01L21/66
- IPC: H01L21/66
Abstract:
In the pattern forming method according to the embodiment, second templates are manufactured by an imprint technology using first templates manufactured by applying a predetermined misalignment distribution for each shot on a first substrate by an exposure apparatus. Then, an upper-layer-side pattern is formed by an imprint technology using a second template in which an inter-layer misalignment amount between a lower-layer-side pattern already formed above a second substrate and the upper-layer-side pattern to be formed above the second substrate becomes equal to or lower than a predetermined reference value.
Public/Granted literature
- US20110300646A1 PATTERN FORMING METHOD, MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE, AND TEMPLATE MANUFACTURING METHOD Public/Granted day:2011-12-08
Information query
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