Invention Grant
- Patent Title: Unitary floating-gate electrode with both N-type and P-type gates
- Patent Title (中): 具有N型和P型门的单一浮栅电极
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Application No.: US13070263Application Date: 2011-03-23
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Publication No.: US08178915B1Publication Date: 2012-05-15
- Inventor: Allan T. Mitchell , Imran Mahmood Khan , Michael A. Wu
- Applicant: Allan T. Mitchell , Imran Mahmood Khan , Michael A. Wu
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Rose Alyssa Keagy; Wade J. Brady, III; Frederick J. Telecky, Jr.
- Main IPC: H01L27/108
- IPC: H01L27/108

Abstract:
An analog floating-gate electrode in an integrated circuit, and method of fabricating the same, in which trapped charge can be stored for long durations. The analog floating-gate electrode is formed in a polycrystalline silicon gate level, and includes n-type and p-type doped portions serving as gate electrodes of n-channel and p-channel MOS transistors, respectively; a plate of a metal-to-poly storage capacitor; and a plate of poly-to-active tunneling capacitors. Silicide-block silicon dioxide blocks the formation of silicide cladding on the electrode, while other polysilicon structures in the integrated circuit are silicide-clad. An opening at the surface of the analog floating-gate electrode, at the location at which n-type and p-type doped portions of the floating gate electrode abut, allow formation of silicide at that location, shorting the p-n junction.
Information query
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