Invention Grant
- Patent Title: Semiconductor package with pad parts electrically connected to bonding pads through re-distribution layers
- Patent Title (中): 半导体封装，其中焊盘部分通过再分配层电连接到焊盘
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Application No.: US12916907Application Date: 2010-11-01
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Publication No.: US08178975B2Publication Date: 2012-05-15
- Inventor: Seung Taek Yang , Shin Young Park
- Applicant: Seung Taek Yang , Shin Young Park
- Applicant Address: KR Kyoungki-do
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Kyoungki-do
- Agency: Ladas & Parry LLP
- Priority: KR10-2007-0083429 20070820
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52
Abstract:
The semiconductor package includes: a semiconductor chip module having multiple adjacently arranged or integrally formed semiconductor chips each with a bonding pad group and a connection member electrically connecting each of the bonding pads included in the first bonding pad group to the corresponding bonding pad in the second bonding pad group. In the present invention pad parts can be formed on the outside of the semiconductor chip module to conform with the standards of JEDEC. These pad parts are then connected to the semiconductor chips bonding pads through re-distribution layers. The pad parts of the semiconductor package can then conform to the JEDEC standards even while having a semiconductor chip with bonding pads smaller than the standards.
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