A charge pump circuit, whose output is connected to a first node, starts a boosting operation after start of a test period. A load current application circuit supplies a load current to the first node during the test period. A voltage of the first node is a write voltage. A memory circuit stops application of the write voltage to a memory cell during the test period, and applies the write voltage to the memory cell after end of the test period. A high voltage detection unit compares the write voltage and a predetermined voltage to determine whether or not the write voltage is increased to the predetermined voltage. If the write voltage is less than the predetermined voltage at the end of the test period, the high voltage detection unit activates a disable signal. If the disable signal is activated, the charge pump circuit stops the boosting operation.