Invention Grant
US08180600B2 Input/output buffer information specification (IBIS) model generation for multi-chip modules (MCM) and similar devices
有权
用于多芯片模块(MCM)和类似设备的输入/输出缓冲区信息规范(IBIS)模型生成
- Patent Title: Input/output buffer information specification (IBIS) model generation for multi-chip modules (MCM) and similar devices
- Patent Title (中): 用于多芯片模块(MCM)和类似设备的输入/输出缓冲区信息规范(IBIS)模型生成
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Application No.: US11469028Application Date: 2006-08-31
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Publication No.: US08180600B2Publication Date: 2012-05-15
- Inventor: James D. Chlipala , Makeshwar Kothandaraman , Nirav Patel , Venu Babu Ummalaneni
- Applicant: James D. Chlipala , Makeshwar Kothandaraman , Nirav Patel , Venu Babu Ummalaneni
- Applicant Address: US PA Allentown
- Assignee: Agere Systems Inc.
- Current Assignee: Agere Systems Inc.
- Current Assignee Address: US PA Allentown
- Agency: Mendelsohn, Drucker & Associates, P.C.
- Agent Edward J. Meisarosh; Steve Mendelsohn
- Main IPC: G06F7/60
- IPC: G06F7/60 ; G06F17/50

Abstract:
In one embodiment, the invention is a method for modeling electrical behavior of a packaged module having multiple integrated circuits (ICs), such as a multi-chip module (MCM). The method includes: (a) identifying one or more pin groups in the module, wherein a pin group comprises two or more buffers connected together and to a package-external pin, and (b) generating one or more corresponding unified behavioral models for the one or more pin groups based on the characteristics of the buffers of the one or more pin groups. The behavioral models are part of an integrated behavioral model file in accordance with the I/O buffer information specification (IBIS) standard.
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