Invention Grant
- Patent Title: Parametric perturbations of performance metrics for integrated circuits
- Patent Title (中): 集成电路性能指标的参数扰动
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Application No.: US12209782Application Date: 2008-09-12
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Publication No.: US08180621B2Publication Date: 2012-05-15
- Inventor: Joel Reuben Phillips
- Applicant: Joel Reuben Phillips
- Applicant Address: US CA San Jose
- Assignee: Cadence Design Systems, Inc.
- Current Assignee: Cadence Design Systems, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Schwegman, Lundberg & Woessner, P.A.
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
A method of simulating parametric variations in an integrated circuit (IC) includes: specifying an IC model, wherein the IC model includes one or more parameters for variation about a nominal condition; calculating parametric perturbations about the nominal condition; and saving one or more values for the parametric perturbations in a computer-readable medium. Calculating the parametric perturbations includes: simulating the nominal condition for the IC; determining perturbation values for the IC model about the nominal conditions, wherein the perturbation values include linear time-varying matrices and parametric right-hand sides, determining a performance metric for the IC and a performance sampling vector for sampling the performance metric about the nominal condition from the perturbation values; and determining voltage-sensitivity values and performance-sensitivity values from the perturbation values and the performance-sampling vector.
Public/Granted literature
- US20090228250A1 PARAMETRIC PERTURBATIONS OF PERFORMANCE METRICS FOR INTEGRATED CIRCUITS Public/Granted day:2009-09-10
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