Invention Grant
- Patent Title: Method of chip repair by stacking a plurality of bad dies
- Patent Title (中): 通过堆叠多个坏的模具来修复芯片的方法
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Application No.: US12536499Application Date: 2009-08-06
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Publication No.: US08193006B2Publication Date: 2012-06-05
- Inventor: Yung-Fa Chou , Ding-Ming Kwai
- Applicant: Yung-Fa Chou , Ding-Ming Kwai
- Applicant Address: TW Hsinchu
- Assignee: Industrial Technology Research Institute
- Current Assignee: Industrial Technology Research Institute
- Current Assignee Address: TW Hsinchu
- Agency: Jianq Chyun IP Office
- Priority: TW98117346A 20090525
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
A method for repairing a chip with a stacked structure of chips is provided. First, a first chip is provided, which includes a first circuit block with a first function, a second circuit block with a second function, and a signal path electrically connected to the first and the second circuit blocks. A second chip is provided, which includes a third circuit block with the first function. The functions of the first and the second chips are verified. The first circuit block is disabled if the first circuit block is defective. The third circuit block is electrically connected to the signal path to replace the first circuit block and provide the first function if the second circuit block is functional and the third circuit block is functional.
Public/Granted literature
- US20100295189A1 METHOD FOR REPAIRING CHIP AND STACKED STRUCTURE OF CHIPS Public/Granted day:2010-11-25
Information query
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