Invention Grant
US08193034B2 Semiconductor device and method of forming vertical interconnect structure using stud bumps
有权
半导体器件和使用柱形凸块形成垂直互连结构的方法
- Patent Title: Semiconductor device and method of forming vertical interconnect structure using stud bumps
- Patent Title (中): 半导体器件和使用柱形凸块形成垂直互连结构的方法
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Application No.: US12492360Application Date: 2009-06-26
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Publication No.: US08193034B2Publication Date: 2012-06-05
- Inventor: Reza A. Pagaila , Byung Tai Do , Shuangwu Huang , Rajendra D. Pendse
- Applicant: Reza A. Pagaila , Byung Tai Do , Shuangwu Huang , Rajendra D. Pendse
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC, Ltd.
- Current Assignee: STATS ChipPAC, Ltd.
- Current Assignee Address: SG Singapore
- Agency: Patent Law Group: Atkins & Associates, P.C.
- Agent Robert D. Atkins
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
A semiconductor device is made by forming a conductive layer over a temporary carrier. The conductive layer includes a wettable pad. A stud bump is formed over the wettable pad. The stud bump can be a stud bump or stacked bumps. A semiconductor die is mounted to the carrier. An encapsulant is deposited over the semiconductor die and around the stud bump. A first interconnect structure is formed over a first surface of the encapsulant. The first interconnect structure includes a first IPD and is electrically connected to the stud bump. The carrier is removed. A second interconnect structure is formed over a second surface of encapsulant opposite the first interconnect structure. The second interconnect structure includes a second IPD. The first or second IPD includes a capacitor, resistor, or inductor. The semiconductor devices are stackable and electrically connected through the stud bump.
Public/Granted literature
- US20090261466A1 Semiconductor Device and Method of Forming Vertical Interconnect Structure Using Stud Bumps Public/Granted day:2009-10-22
Information query
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