Invention Grant
- Patent Title: Integrated circuit and a method using integrated process steps to form deep trench isolation structures and deep trench capacitor structures for the integrated circuit
- Patent Title (中): 集成电路和采用集成工艺步骤形成集成电路的深沟槽隔离结构和深沟槽电容器结构的方法
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Application No.: US12630091Application Date: 2009-12-03
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Publication No.: US08193067B2Publication Date: 2012-06-05
- Inventor: Brent A. Anderson , Andres Bryant , Herbert L. Ho , Edward J. Nowak
- Applicant: Brent A. Anderson , Andres Bryant , Herbert L. Ho , Edward J. Nowak
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Gibb I.P. Law Firm, LLC
- Agent David A. Cain, Esq.
- Main IPC: H01L21/20
- IPC: H01L21/20

Abstract:
Disclosed is an integrated circuit having at least one deep trench isolation structure and a deep trench capacitor. A method of forming the integrated circuit incorporates a single etch process to simultaneously form first trench(s) and a second trenches for the deep trench isolation structure(s) and a deep trench capacitor, respectively. Following formation of a buried capacitor plate adjacent to the lower portion of the second trench, the trenches are lined with a conformal insulator layer and filled with a conductive material. Thus, for the deep trench capacitor, the conformal insulator layer functions as the capacitor dielectric and the conductive material as a capacitor plate in addition to the buried capacitor plate. A shallow trench isolation (STI) structure formed in the substrate extending across the top of the first trench(es) encapsulates the conductive material therein, thereby creating the deep trench isolation structure(s).
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