Invention Grant
- Patent Title: Method of manufacturing semiconductor device
- Patent Title (中): 制造半导体器件的方法
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Application No.: US12591491Application Date: 2009-11-20
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Publication No.: US08193084B2Publication Date: 2012-06-05
- Inventor: Kazuyuki Sutou , Hiroaki Tomita
- Applicant: Kazuyuki Sutou , Hiroaki Tomita
- Applicant Address: US AZ Phoenix JP Gunma JP Ojiya-shi
- Assignee: Semiconductor Components Industries, LLC,SANYO Semiconductor Co., Ltd.,SANYO Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Semiconductor Components Industries, LLC,SANYO Semiconductor Co., Ltd.,SANYO Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: US AZ Phoenix JP Gunma JP Ojiya-shi
- Agency: Morrison & Foerster LLP
- Priority: JP2008-297573 20081121
- Main IPC: H01L21/60
- IPC: H01L21/60

Abstract:
When a bump electrode is formed on an opening formed in a semiconductor substrate, the invention prevents a void that is caused by gas trapped in the opening. A method of manufacturing a semiconductor device of the invention includes forming a first wiring on a main surface of a semiconductor substrate, forming an opening in the semiconductor substrate from the back surface to the main surface so as to expose the back surface of the first wiring, forming a second wiring connected to the back surface of the first wiring and extending from inside the opening onto the back surface of the semiconductor substrate, forming a solder layer connected to part of the second wiring on the bottom of the opening and extending from inside the opening onto the back surface of the semiconductor substrate, and forming a bump electrode on the opening by reflowing the solder layer.
Public/Granted literature
- US20100130000A1 Method of manufacturing semiconductor device Public/Granted day:2010-05-27
Information query
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