Invention Grant
US08193099B1 Protecting exposed metal gate structures from etching processes in integrated circuit manufacturing 有权
保护暴露的金属栅极结构免受集成电路制造中的蚀刻工艺

Protecting exposed metal gate structures from etching processes in integrated circuit manufacturing
Abstract:
A method of forming a semiconductor device includes forming a transistor gate stack over a substrate having an active area and a shallow trench isolation (STI) region. First sidewall spacers are formed on the transistor gate stack, and an isotropic etch process is applied to isotropically remove an excess portion of a metal layer included within the transistor gate stack, the excess portion left unprotected by the first sidewall spacers. Second sidewall spacers are formed on the transistor gate stack, the second sidewall spacers completely encapsulating the metal layer of the transistor gate stack.
Information query
Patent Agency Ranking
0/0