Invention Grant
US08193099B1 Protecting exposed metal gate structures from etching processes in integrated circuit manufacturing
有权
保护暴露的金属栅极结构免受集成电路制造中的蚀刻工艺
- Patent Title: Protecting exposed metal gate structures from etching processes in integrated circuit manufacturing
- Patent Title (中): 保护暴露的金属栅极结构免受集成电路制造中的蚀刻工艺
-
Application No.: US13049933Application Date: 2011-03-17
-
Publication No.: US08193099B1Publication Date: 2012-06-05
- Inventor: Mukesh V. Khare , Renee T. Mo , Ravikumar Ramachandran , Richard S. Wise , Hongwen Yan
- Applicant: Mukesh V. Khare , Renee T. Mo , Ravikumar Ramachandran , Richard S. Wise , Hongwen Yan
- Applicant Address: US NC Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NC Armonk
- Agency: Cantor Colburn LLP
- Agent Ian MacKinnon
- Main IPC: H01L21/302
- IPC: H01L21/302 ; H01L21/461

Abstract:
A method of forming a semiconductor device includes forming a transistor gate stack over a substrate having an active area and a shallow trench isolation (STI) region. First sidewall spacers are formed on the transistor gate stack, and an isotropic etch process is applied to isotropically remove an excess portion of a metal layer included within the transistor gate stack, the excess portion left unprotected by the first sidewall spacers. Second sidewall spacers are formed on the transistor gate stack, the second sidewall spacers completely encapsulating the metal layer of the transistor gate stack.
Information query
IPC分类: