Invention Grant
US08193491B2 Structure and method for determining a defect in integrated circuit manufacturing process 有权
用于确定集成电路制造过程中的缺陷的结构和方法

Structure and method for determining a defect in integrated circuit manufacturing process
Abstract:
The present invention discloses a structure and a method for determining a defect in integrated circuit manufacturing process. Test keys are designed for the structure to be the interlaced arrays of grounded and floating conductive cylinders, and the microscopic image can be predicted to be an interlaced pattern of bright voltage contrast (BVC) and dark voltage contrast (DVC) signals for a charged particle beam imaging system. The system can detect the defects by comparing patterns of the detected VC signals and the predicted VC signals.
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