Invention Grant
US08193491B2 Structure and method for determining a defect in integrated circuit manufacturing process
有权
用于确定集成电路制造过程中的缺陷的结构和方法
- Patent Title: Structure and method for determining a defect in integrated circuit manufacturing process
- Patent Title (中): 用于确定集成电路制造过程中的缺陷的结构和方法
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Application No.: US12240048Application Date: 2008-09-29
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Publication No.: US08193491B2Publication Date: 2012-06-05
- Inventor: Hong Xiao
- Applicant: Hong Xiao
- Applicant Address: TW Hsinchu
- Assignee: Hermes Microvision, Inc.
- Current Assignee: Hermes Microvision, Inc.
- Current Assignee Address: TW Hsinchu
- Agency: Rosenberg, Klein & Lee
- Main IPC: H01J37/26
- IPC: H01J37/26

Abstract:
The present invention discloses a structure and a method for determining a defect in integrated circuit manufacturing process. Test keys are designed for the structure to be the interlaced arrays of grounded and floating conductive cylinders, and the microscopic image can be predicted to be an interlaced pattern of bright voltage contrast (BVC) and dark voltage contrast (DVC) signals for a charged particle beam imaging system. The system can detect the defects by comparing patterns of the detected VC signals and the predicted VC signals.
Public/Granted literature
- US20100078554A1 Structure and Method for Determining a Defect in Integrated Circuit Manufacturing Process Public/Granted day:2010-04-01
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