Invention Grant
- Patent Title: Microelectronic package comprising offset conductive posts on compliant layer
- Patent Title (中): 微电子封装包括柔性层上的偏移导电柱
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Application No.: US10985126Application Date: 2004-11-10
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Publication No.: US08207604B2Publication Date: 2012-06-26
- Inventor: Belgacem Haba , Masud Beroz , Giles Humpston , Jae M. Park
- Applicant: Belgacem Haba , Masud Beroz , Giles Humpston , Jae M. Park
- Applicant Address: US CA San Jose
- Assignee: Tessera, Inc.
- Current Assignee: Tessera, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Lerner, David, Littenberg, Krumholz & Mentlik, LLP
- Main IPC: H01L23/485
- IPC: H01L23/485

Abstract:
A microelectronic package includes a mounting structure, a microelectronic element associated with the mounting structure, and a plurality of conductive posts physically connected to the mounting structure and electrically connected to the microelectronic element. The conductive posts project from the mounting structure in an upward direction, at least one of the conductive posts being an offset post. Each offset post has a base connected to the mounting structure, the base of each offset post defining a centroid. Each offset post also defines an upper extremity having a centroid, the centroid of the upper extremity being offset from the centroid of the base in a horizontal offset direction transverse to the upward direction. The mounting structure is adapted to permit tilting of each offset post about a horizontal axis so that the upper extremities may wipe across a contact pad of an opposing circuit board.
Public/Granted literature
- US20050181655A1 Micro pin grid array with wiping action Public/Granted day:2005-08-18
Information query
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