Invention Grant
- Patent Title: Series regulator circuit and semiconductor integrated circuit
- Patent Title (中): 串联稳压电路和半导体集成电路
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Application No.: US12467628Application Date: 2009-05-18
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Publication No.: US08207719B2Publication Date: 2012-06-26
- Inventor: Tetsuyoshi Shiota
- Applicant: Tetsuyoshi Shiota
- Applicant Address: JP Kawasaki
- Assignee: Fujitsu Limited
- Current Assignee: Fujitsu Limited
- Current Assignee Address: JP Kawasaki
- Agency: Arent Fox LLP
- Priority: JP2008-171576 20080630
- Main IPC: G05F1/563
- IPC: G05F1/563 ; G05F1/59

Abstract:
A series regulator circuit includes one or more transistors each having a channel with one end coupled to an input node to receive an input voltage and another end coupled to an output node, and having a control node to receive a control voltage, a control circuit configured to adjust the control voltage in response to a voltage of the output node such that the voltage of the output node is set equal to a voltage setting selected by an output voltage setting signal, and a switch circuit configured to change an operating condition, excluding the control voltage, of the one or more transistors in conjunction with a change in the voltage setting of the output node.
Public/Granted literature
- US20090322297A1 SERIES REGULATOR CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT Public/Granted day:2009-12-31
Information query
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