A TFT array substrate comprising a substrate has a pixel region and a peripheral circuit region surrounding the pixel region, a TFT array, first lead lines, second lead lines, and first repair patterns is provided. The peripheral circuit region has an outer area and an inner area. The inner area is disposed between the pixel region and the outer area. The TFT array disposed in the pixel region includes a first conducting layer and a second conducting layer. The first lead lines and the second lead lines disposed in the peripheral circuit region are on the same layer of the first conducting layer and the second conducting layer respectively. The first repair patterns disposed in the inner area are sandwiched between the second lead lines and the substrate. At least a first pre-repair area is at a region where the second lead lines and the first repair patterns are overlapped.