Invention Grant
US08208305B2 Arrangement of pairs of NAND strings that share bitline contacts while utilizing distinct sources lines
有权
在使用不同的源极线的同时分配位线触点的NAND串对
- Patent Title: Arrangement of pairs of NAND strings that share bitline contacts while utilizing distinct sources lines
- Patent Title (中): 在使用不同的源极线的同时分配位线触点的NAND串对
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Application No.: US12655157Application Date: 2009-12-23
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Publication No.: US08208305B2Publication Date: 2012-06-26
- Inventor: Toru Tanzawa
- Applicant: Toru Tanzawa
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Winkle, PLLC
- Main IPC: G11C11/34
- IPC: G11C11/34
Abstract:
A non-volatile microelectronic memory that has a memory cell array, which includes memory cell string pairs that share a bitline contact, that have separate source lines, and that have at least two transistors within each memory cell string that may be programming for sharing the bitline contact.
Public/Granted literature
- US20110149655A1 Non-volatile memory cell array Public/Granted day:2011-06-23
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