Invention Grant
US08208324B2 Semiconductor memory device that can relief defective address 有权
可以缓解缺陷地址的半导体存储器件

Semiconductor memory device that can relief defective address
Abstract:
To comprise a memory cell array, a read amplifier that is provided outside the memory cell array and amplifies data read from the memory cell array, a write amplifier that is provided outside the memory cell array and amplifies data to be written in the memory cell array, and a relief storage cell that is provided outside the memory cell array and connected to an input terminal of the read amplifier and an output terminal of the write amplifier via a switch. With this configuration, a timing of operating a main amplifier and the relief storage cell does not need to be changed depending on a position of a memory block. Further, the number of components required for connecting to the relief storage cell can be minimized.
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