Invention Grant
- Patent Title: No-disturb bit line write for improving speed of eDRAM
- Patent Title (中): 无干扰位线写入以提高eDRAM的速度
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Application No.: US13094389Application Date: 2011-04-26
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Publication No.: US08208329B2Publication Date: 2012-06-26
- Inventor: Subramani Kengeri , Kuoyuan (Peter) Hsu , Bing Wang
- Applicant: Subramani Kengeri , Kuoyuan (Peter) Hsu , Bing Wang
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater & Matsil, L.L.P.
- Main IPC: G11C7/00
- IPC: G11C7/00

Abstract:
A method of operating a memory circuit includes providing the memory circuit. The memory circuit includes a memory cell; a word line connected to the memory cell; a first local bit line and a second local bit line connected to the memory cell; and a first global bit line and a second global bit line coupled to the first and the second local bit lines, respectively. The method further includes starting an equalization to equalize voltages on the first and the second local bit lines; stopping the equalization; and after the step of starting the equalization and before the step of stopping the equalization, writing values from the first and the second global bit lines to the first and the second local bit lines.
Public/Granted literature
- US20110199835A1 No-Disturb Bit Line Write for Improving Speed of eDRAM Public/Granted day:2011-08-18
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