Embodiments of the invention are generally directed to systems, methods, and apparatuses for improving power/performance tradeoffs associated with multi-core memory thermal throttling algorithms. In some embodiments, the priority of shared resource allocation is changed on one or more points in a system, while the system is in dynamic random access memory (DRAM) throttling mode. This may enable the forward progress of cache bound workloads while still throttling DRAM for memory bound workloads.