An information handling system (“IHS”) including a processor, a memory controller coupled to the processor, and a memory device interface coupled to the memory controller is provided. The IHS also includes a voltage control circuit, coupled to the interface, for determining whether the interface is coupled to a memory expansion board or a memory device. In response to determining that the interface is coupled to a memory device, the circuit activates a first voltage regulator for supplying a first level of voltage. In response to determining that the interface is coupled to a memory expansion board, the circuit activates a second voltage regulator for supplying a second level of voltage.