Invention Grant
US08209560B2 Transmission system where a first device generates information for controlling transmission and latch timing for a second device
有权
传输系统,其中第一设备产生用于控制第二设备的传输和锁存定时的信息
- Patent Title: Transmission system where a first device generates information for controlling transmission and latch timing for a second device
- Patent Title (中): 传输系统,其中第一设备产生用于控制第二设备的传输和锁存定时的信息
-
Application No.: US12547863Application Date: 2009-08-26
-
Publication No.: US08209560B2Publication Date: 2012-06-26
- Inventor: Toru Ishikawa
- Applicant: Toru Ishikawa
- Applicant Address: JP Tokyo
- Assignee: Elpida Memory, Inc.
- Current Assignee: Elpida Memory, Inc.
- Current Assignee Address: JP Tokyo
- Agency: Sughrue Mion, PLLC
- Priority: JP2008-217343 20080826; JP2009-149749 20090624
- Main IPC: G06F1/12
- IPC: G06F1/12 ; G06F13/42 ; H04L7/00

Abstract:
To provide a semiconductor device including a data input circuit and a data output circuit connected to a plurality of data input/output terminals, where at least one of the data input circuit and the data output circuit fetches data in response to multi-phase clock signals having different phases to be timing signals for fetching data, and adjusts a valid range for fetching data to be substantially uniform for each of the multi-phase clock signals. According to the present invention, the window width of data can be made uniform by individually adjusting the multi-phase clock signals that are input or output timing signals, and thus characteristics of the semiconductor device can be improved.
Public/Granted literature
- US20100058104A1 SEMICONDUCTOR DEVICE AND DATA TRANSMISSION SYSTEM Public/Granted day:2010-03-04
Information query