A valid-transmission verifying circuit and a semiconductor device including the same are provided. The valid-transmission verifying circuit provides data to an output circuit in correspondence with reference data, the valid-transmission verifying circuit comprising: a data receiving terminal receiving the reference data; a valid-transmission verifier including a reference load unit configured to sample the reference data, the data sampling operation is interrupted in response to a sampling control signal to determine whether the data sampling operation has been performed within a sampling time; and a selection switch providing the reference data to one of the normal output circuit and the valid-transmission verifier in response to a mode selection signal.