Invention Grant
- Patent Title: System and method for converting a synchronous functional circuit to an asynchronous functional circuit
- Patent Title (中): 将同步功能电路转换为异步功能电路的系统和方法
-
Application No.: US12565955Application Date: 2009-09-24
-
Publication No.: US08209645B2Publication Date: 2012-06-26
- Inventor: Hidetomo Kobayashi
- Applicant: Hidetomo Kobayashi
- Applicant Address: JP
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP
- Agency: Husch Blackwell LLP
- Priority: JP2008-247509 20080926
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
A hierarchizing means 101 for blocking, of a first description which represents a functional circuit in an RTL, a second description and for converting the first description into a hierarchized third description; a first logic synthesis means 102 for logic synthesis of the third description; a first placement and routing means 103 for first placement and routing; a first substitution means 104 for substituting a fourth description indicating the unit circuit which is asynchronous for the second description; a second logic synthesis means 105 for logic synthesis of the fourth description; a second placement and routing means 106 for second placement and routing; a calculation means 107 for calculating a circuit on which the second placement and routing is performed; and a second substitution means 108 for substituting the circuit on which placement and routing is performed by the second placement and routing means 106 for a selected circuit on which placement and routing is performed by the first placement and routing means 103.
Public/Granted literature
- US20100083207A1 System for Designing Functional Circuit and Method for Designing Functional Circuit Public/Granted day:2010-04-01
Information query