Invention Grant
- Patent Title: Method and structure for bonding flip chip
- Patent Title (中): 键合倒装芯片的方法和结构
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Application No.: US12761715Application Date: 2010-04-16
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Publication No.: US08211745B2Publication Date: 2012-07-03
- Inventor: Yong Sung Eom , Jong Tae Moon , Kwang-Seong Choi
- Applicant: Yong Sung Eom , Jong Tae Moon , Kwang-Seong Choi
- Applicant Address: KR Daejeon
- Assignee: Electronics and Telecommunications Research Institute
- Current Assignee: Electronics and Telecommunications Research Institute
- Current Assignee Address: KR Daejeon
- Agency: Rabin & Berdo, P.C.
- Priority: KR10-2009-0098239 20091015
- Main IPC: H01L21/60
- IPC: H01L21/60 ; H01L21/44 ; H01L23/498
Abstract:
Provided is a method and structure for bonding a flip chip while increasing the manufacturing yield. In the method, solder bumps are formed on first electrodes and/or second electrodes disposed on first and second substrates, respectively. In addition, the first and second electrodes are arranged to face each other with a second resin including spacer balls being disposed between the first and second substrates. In addition, while flowing the second resin, the first and second substrates are pressed until the distance between the first and second substrates is decreased smaller than diameter of the spacer balls so as to connect the solder bumps between the first and second electrodes.
Public/Granted literature
- US20110089577A1 METHOD AND STRUCTURE FOR BONDING FLIP CHIP Public/Granted day:2011-04-21
Information query
IPC分类:
