Invention Grant
- Patent Title: Multiple-gate transistors and processes of making same
- Patent Title (中): 多栅极晶体管及其制造方法
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Application No.: US13216569Application Date: 2011-08-24
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Publication No.: US08211771B2Publication Date: 2012-07-03
- Inventor: Ravi Pillarisetty , Jack Kavalieros , Marko Radosavljevic , Benjamin Chu-Kung
- Applicant: Ravi Pillarisetty , Jack Kavalieros , Marko Radosavljevic , Benjamin Chu-Kung
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agent John N. Greaves
- Main IPC: H01L21/336
- IPC: H01L21/336

Abstract:
A microelectronic device includes a P-I-N (p+ region, intrinsic semiconductor, and n+ region) semiconductive body with a first gate and a second gate. The first gate is a gate stack disposed on an upper surface plane, and the second gate accesses the semiconductive body from a second plane that is out of the first plane.
Public/Granted literature
- US20110312140A1 MULTIPLE-GATE TRANSISTORS AND PROCESSES OF MAKING SAME Public/Granted day:2011-12-22
Information query
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