An improved bipolar transistor (40, 40′) is provided, manufacturable by a CMOS IC process without added steps. The improved transistor (40, 40′) comprises an emitter (48) having first (482) and second (484) portions of different depths (4821, 4841), a base (46) underlying the emitter (48) having a central portion (462) of a first base width (4623) underlying the first portion (482) of the emitter (48), a peripheral portion (464) having a second base width (4643) larger than the first base width (4623) partly underlying the second portion (484) of the emitter (48), and a transition zone (466) of a third base width (4644) and lateral extent (4661) lying laterally between the first (462) and second (464) portions of the base (46), and a collector (44) underlying the base (46). The gain of the transistor (40, 40′) is much larger than a conventional bipolar transistor (20) made using the same CMOS process. By adjusting the lateral extent (4661) of the transition zone (466), the properties of the improved transistor (40, 40′) can be tailored to suit different applications without modifying the underlying CMOS IC process.