Provided are an architecture for a non-volatile memory device that can increase the write efficiency for split-gate trap memory, as well as increase resistance to disturbances; and a method of manufacturing said memory device. The device includes, at least: a layered film having traps, formed on top of the semiconductor substrate; a memory gate electrode formed on top of the layered film; a word gate electrode laid out so as to contact the memory gate electrode and the substrate through an insulating film; and source and drain regions in the substrate, sandwiching the two gate electrodes. The equivalent oxide thickness of the insulating film sandwiched between the word gate electrode and the substrate is made greater where the layered film is in contact than where there is no contact.