Invention Grant
US08212359B2 Semiconductor integrated circuit device, mounting structure of semiconductor integrated circuit device, and method for manufacturing semiconductor integrated circuit device 有权
半导体集成电路器件,半导体集成电路器件的安装结构以及半导体集成电路器件的制造方法

  • Patent Title: Semiconductor integrated circuit device, mounting structure of semiconductor integrated circuit device, and method for manufacturing semiconductor integrated circuit device
  • Patent Title (中): 半导体集成电路器件,半导体集成电路器件的安装结构以及半导体集成电路器件的制造方法
  • Application No.: US12605567
    Application Date: 2009-10-26
  • Publication No.: US08212359B2
    Publication Date: 2012-07-03
  • Inventor: Yuki Ito
  • Applicant: Yuki Ito
  • Applicant Address: JP Kyoto
  • Assignee: Murata Manufacturing Co., Ltd.
  • Current Assignee: Murata Manufacturing Co., Ltd.
  • Current Assignee Address: JP Kyoto
  • Agency: Keating & Bennett, LLP
  • Priority: JP2008-016977 20080128
  • Main IPC: H01L23/48
  • IPC: H01L23/48 H01L23/52 H01L21/4763 H01L21/44
Semiconductor integrated circuit device, mounting structure of semiconductor integrated circuit device, and method for manufacturing semiconductor integrated circuit device
Abstract:
A semiconductor integrated circuit device can be mounted on a circuit board through capacitive coupling even when being miniaturized. A passivation film disposed on a principal surface of a semiconductor substrate provided with a plurality of wirings laminated sequentially with insulating films therebetween has an opening at which at least a portion of the uppermost layer wiring is exposed. An electrode is arranged to cover the uppermost layer wiring exposed at the opening of the passivation film and the periphery of the opening of the passivation film. A dielectric layer is arranged to cover the electrode. An extension portion of the electrode on the surface of the passivation film and an electrode of a circuit board are capacitively coupled with a dielectric layer therebetween.
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