An internal voltage generation circuit includes a first enable signal generator configured to delay an active signal to generate a first enable signal, a comparison signal generator configured to compare the internal voltage with an internal reference voltage to generate a comparison signal, a pulse signal generator configured to receive the first enable signal and to generate a pulse signal, a transmission device configured to buffer and transfer the comparison signal as a pull-down signal, and a drive device configured to drive the driving signal to the first level in response to the pull-down signal.