A loadless static random access memory cell is provided. The memory cell includes four transistors. The first transistor has a gate terminal corresponding to a word line of the memory cell, a source/drain terminal corresponding to a first bit line of the memory cell, and a drain/source terminal corresponding to a first storage node of the memory cell. The second transistor has a gate terminal corresponding to the word line, a source/drain terminal corresponding to a second bit line of the memory cell, and a drain/source terminal corresponding to a second storage node of the memory cell. The third transistor has a gate terminal coupled to the second storage node, a drain terminal coupled to the first storage node, a source terminal corresponding to a reference voltage, and a body terminal directly connected to the third gate terminal. The fourth transistor has a gate terminal coupled to the first storage node, a drain terminal coupled to the second storage node, a source terminal corresponding to the reference voltage, and a body terminal directly connected to the fourth gate terminal.