Invention Grant
- Patent Title: Additive pre-distortion for linearization
- Patent Title (中): 用于线性化的加法预失真
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Application No.: US12190781Application Date: 2008-08-13
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Publication No.: US08213883B1Publication Date: 2012-07-03
- Inventor: Adric Quade Broadwell
- Applicant: Adric Quade Broadwell
- Applicant Address: US CA Sunnyvale
- Assignee: Scintera Networks, Inc.
- Current Assignee: Scintera Networks, Inc.
- Current Assignee Address: US CA Sunnyvale
- Agency: Haynes and Boone, LLP
- Main IPC: H04B1/04
- IPC: H04B1/04

Abstract:
In one embodiment, a signal processor for linearizing a non-linear circuit through pre-distortion of an input signal is provided that includes: a first coupler for extracting a version of the input signal, wherein a remaining portion of the input signal not extracted by the first coupler is provided to a first node; a mixer for multiplying the extracted version of the input signal with a pre-distortion signal to produce an additive signal, the pre-distortion signal having a relatively small or zero constant component such that the additive signal includes either no linear version of the input signal or a linear version of the input signal that has a lower power than the remaining portion of the input signal; and a second coupler to add the additive signal to the remaining portion of the input signal at the first node to form a pre-distorted input signal, whereby if the non-linear circuit processes the pre-distorted input signal to form an output signal, the output signal is a substantially linear function of the input signal.
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