Invention Grant
US08214706B2 Method and apparatus for testing an electronic circuit integrated with a semiconductor device
有权
用于测试与半导体器件集成的电子电路的方法和装置
- Patent Title: Method and apparatus for testing an electronic circuit integrated with a semiconductor device
- Patent Title (中): 用于测试与半导体器件集成的电子电路的方法和装置
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Application No.: US12714833Application Date: 2010-03-01
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Publication No.: US08214706B2Publication Date: 2012-07-03
- Inventor: Masayuki Urabe , Akio Goto
- Applicant: Masayuki Urabe , Akio Goto
- Applicant Address: BM Hamilton
- Assignee: Marvell International Ltd.
- Current Assignee: Marvell International Ltd.
- Current Assignee Address: BM Hamilton
- Priority: JP2006-176036 20060627
- Main IPC: G06F11/00
- IPC: G06F11/00

Abstract:
A semiconductor device including an electronic circuit, a memory, and an error detecting module. The electronic circuit is configured to receive an input signal having been generated by a test module, and generate an output signal based on the input signal. The memory is configured to store a predetermined output value that is expected to be output from the electronic circuit based on the electronic receiving the input signal, wherein the predetermined output value is stored in the memory prior to the input signal being generated by the test module. The error detecting module is configured to (i) generate a sample value of the output signal, (ii) compare the sample value of the output signal to the predetermined output value stored in the memory, and (iii) generate a result signal that indicates whether the sample value of the output signal matches the predetermined output value.
Public/Granted literature
- US20100153801A1 METHOD FOR AT SPEED TESTING OF DEVICES Public/Granted day:2010-06-17
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