Invention Grant
US08216924B2 Methods of fabricating transistors using laser annealing of source/drain regions
有权
使用源极/漏极区域的激光退火制造晶体管的方法
- Patent Title: Methods of fabricating transistors using laser annealing of source/drain regions
- Patent Title (中): 使用源极/漏极区域的激光退火制造晶体管的方法
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Application No.: US12580633Application Date: 2009-10-16
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Publication No.: US08216924B2Publication Date: 2012-07-10
- Inventor: Alexander V. Suvorov
- Applicant: Alexander V. Suvorov
- Applicant Address: US NC Durham
- Assignee: Cree, Inc.
- Current Assignee: Cree, Inc.
- Current Assignee Address: US NC Durham
- Agency: Myers Bigel Sibley & Sajovec, P.A.
- Main IPC: H01L21/265
- IPC: H01L21/265 ; H01L21/26 ; H01L21/336 ; H01L21/8234 ; H01L21/337

Abstract:
Fabrication of a Group III-nitride transistor device can include implanting dopant ions into a stacked Group III-nitride channel layer and Group III-nitride barrier layer to form source/drain regions therein with a channel region therebetween. The channel layer has a lower bandgap energy than the barrier layer along a heterojunction interface between the channel layer and the barrier layer. The source/drain regions have a lower defect centers energy than the channel region. The source/drain regions and the channel region are exposed to a laser beam with a wavelength having a photon energy that is less than the bandgap energy of the channel region and higher than the defect centers energy of the source/drain regions to locally heat the source/drain regions to a temperature that anneals the source/drain regions.
Public/Granted literature
- US20110092057A1 METHODS OF FABRICATING TRANSISTORS USING LASER ANNEALING OF SOURCE/DRAIN REGIONS Public/Granted day:2011-04-21
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