Invention Grant
- Patent Title: Chip scale surface mounted semiconductor device package and process of manufacture
- Patent Title (中): 芯片级表面安装半导体器件封装及制造工艺
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Application No.: US12507778Application Date: 2009-07-22
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Publication No.: US08222078B2Publication Date: 2012-07-17
- Inventor: Tao Feng
- Applicant: Tao Feng
- Applicant Address: US CA Sunnyvale
- Assignee: Alpha and Omega Semiconductor Incorporated
- Current Assignee: Alpha and Omega Semiconductor Incorporated
- Current Assignee Address: US CA Sunnyvale
- Agency: JDI Patent
- Agent Joshua D. Isenberg
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
A semiconductor device package die and method of manufacture are disclosed. The device package die may comprise a device substrate having one or more front electrodes located on a front surface of the device substrate and electrically connected to one or more corresponding device regions formed within the device substrate proximate the front surface. A back conductive layer is formed on a back surface of the device substrate. The back conductive layer is electrically connected to a device region formed within the device substrate proximate a back surface of the device substrate. One or more conductive extensions are formed on one or more corresponding sidewalls of the device substrate in electrical contact with the back conductive layer, and extend to a portion of the front surface of the device substrate. A support substrate is bonded to the back surface of the device substrate.
Public/Granted literature
- US20110018116A1 CHIP SCALE SURFACE MOUNTED SEMICONDUCTOR DEVICE PACKAGE AND PROCESS OF MANUFACTURE Public/Granted day:2011-01-27
Information query
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