Invention Grant
- Patent Title: Wafer level buck converter
- Patent Title (中): 晶圆级降压转换器
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Application No.: US13342446Application Date: 2012-01-03
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Publication No.: US08222081B2Publication Date: 2012-07-17
- Inventor: Yong Liu , Qi Wang
- Applicant: Yong Liu , Qi Wang
- Applicant Address: US ME South Portland
- Assignee: Fairchild Semiconductor Corporation
- Current Assignee: Fairchild Semiconductor Corporation
- Current Assignee Address: US ME South Portland
- Agency: Hiscock & Barclay, LLP
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
A buck converter module includes a high side (HS) die having source, drain, and gate bonding pads on a front side of the HS die, a low side (LS) die having a first section thereof with a plurality of through silicon vias (TSVs) extending from a back side to a front side of the LS die, the LS die having source, drain, and gate bonding pads located on a front side of a second section separate from the first section, the drain bonding pad electrically connected to the back side of the LS die in the second section. The HS die and the LS die are bonded together such that the source bonding pad of the HS die is electrically connected to the back side of the LS die, and each of the drain and gate bonding pads are electrically connected to separate TSVs in the LS die.
Public/Granted literature
- US20120100670A1 WAFER LEVEL BUCK CONVERTER Public/Granted day:2012-04-26
Information query
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