Invention Grant
- Patent Title: Noise reducing circuit arrangement
- Patent Title (中): 降噪电路布置
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Application No.: US12169778Application Date: 2008-07-09
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Publication No.: US08222535B2Publication Date: 2012-07-17
- Inventor: Roland Frech , Thomas-Michael Winkel , Erich Klink
- Applicant: Roland Frech , Thomas-Michael Winkel , Erich Klink
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Steven Chiu
- Priority: EP07112819 20070720
- Main IPC: H05K1/11
- IPC: H05K1/11 ; H05K7/00

Abstract:
A circuit arrangement comprising a set of signal layers, a set of first power layers, a set of second power layers, a set of signal vias, a set of first power vias, a set of second power vias, wherein a signal via of the set of signal vias provides a signal path for a high-frequency (HF) signal current, wherein at least a power via of the set of first power vias and at least a power via of the set of second power vias provide return paths for return currents associated with the signal current, wherein the return path provided by the power via of the set of second power vias is connected with a power layer of the set of second power layers, wherein at least one power layer of the set of first power layers is arranged between the power layer of the set of second power layers and each signal layer of the set of signal layers.
Public/Granted literature
- US20080283285A1 Circuit Arrangement Public/Granted day:2008-11-20
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