Disclosed are a dual bit type NROM flash memory device and a method for manufacturing the same using a self-aligned scheme. The flash memory device includes a plurality of bit lines buried in a substrate in one direction while being spaced apart from each other at a regular interval; floating gates aligned at both sides of each of the bit lines on the substrate; and a plurality of word lines spaced apart from each other at a regular interval while crossing the bit lines. In the flash memory device of an embodiment, polysilicon is used for a trapping layer, so the programming and erasing operations can be performed at a higher speed, a threshold voltage (Vt) window is widened, and retention characteristics are improved.