Invention Grant
US08222702B2 CMOS diodes with dual gate conductors, and methods for forming the same
有权
具有双栅导体的CMOS二极管及其形成方法
- Patent Title: CMOS diodes with dual gate conductors, and methods for forming the same
- Patent Title (中): 具有双栅导体的CMOS二极管及其形成方法
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Application No.: US12814930Application Date: 2010-06-14
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Publication No.: US08222702B2Publication Date: 2012-07-17
- Inventor: David M. Onsongo , Werner Rausch , Haining S. Yang
- Applicant: David M. Onsongo , Werner Rausch , Haining S. Yang
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Scully, Scott, Murphy & Presser, P.C.
- Agent Joseph P. Abate, Esq.
- Main IPC: H01L21/70
- IPC: H01L21/70

Abstract:
The present invention provides an improved CMOS diode structure with dual gate conductors. Specifically, a substrate comprising a first n-doped region and a second p-doped region is formed. A third region of either n-type or p-type conductivity is located between the first and second regions. A first gate conductor of n-type conductivity and a second gate conductor of p-type conductivity are located over the substrate and adjacent to the first and second regions, respectively. Further, the second gate conductor is spaced apart and isolated from the first gate conductor by a dielectric isolation structure. An accumulation region with an underlying depletion region can be formed in such a diode structure between the third region and the second or the first region, and such an accumulation region preferably has a width that is positively correlated with that of the second or the first gate conductor.
Public/Granted literature
- US20100252881A1 CMOS DIODES WITH DUAL GATE CONDUCTORS, AND METHODS FOR FORMING THE SAME Public/Granted day:2010-10-07
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