Invention Grant
US08222910B2 Method and apparatus for sub-assembly error detection in high voltage analog circuits and pins
有权
用于高压模拟电路和引脚中的子组件错误检测的方法和装置
- Patent Title: Method and apparatus for sub-assembly error detection in high voltage analog circuits and pins
- Patent Title (中): 用于高压模拟电路和引脚中的子组件错误检测的方法和装置
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Application No.: US12504308Application Date: 2009-07-16
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Publication No.: US08222910B2Publication Date: 2012-07-17
- Inventor: Dilip Sangam , Hendrik Santo , Sean Chen , Minjong Kim , Sivaprakash Kannan , Balaji Virajpet
- Applicant: Dilip Sangam , Hendrik Santo , Sean Chen , Minjong Kim , Sivaprakash Kannan , Balaji Virajpet
- Applicant Address: US CA San Jose
- Assignee: Atmel Corporation
- Current Assignee: Atmel Corporation
- Current Assignee Address: US CA San Jose
- Agency: Fish & Richardson P.C.
- Main IPC: G01R31/02
- IPC: G01R31/02

Abstract:
The innovation relates to systems and/or methodologies for error detection during sub-assembly in high voltage analog circuits. A signal driver communicates test signals to one or more high voltage analog circuits, and a state machine compares the electrical and/or thermal responses of the high voltage analog circuits to a set of predetermined expected results (e.g., signatures). The signal driver and state machine can be incorporated into the high voltage analog circuits. The expected results can be stored in the target circuits in the form of look-up tables, matrices, and so forth. Errors, such as, dry solders and bridge solders can be determined based on the comparison of the obtained responses to the expected signatures.
Public/Granted literature
- US20110012609A1 METHOD AND APPARTUS FOR SUB-ASSEMBLY ERROR DETECTION IN HIGH VOLTAGE ANALOG CIRCUITS AND PINS Public/Granted day:2011-01-20
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