Invention Grant
US08223053B2 2-phase gain calibration and scaling scheme for switched capacitor sigma-delta modulator
有权
开关电容Σ-Δ调制器的2相增益校准和缩放方案
- Patent Title: 2-phase gain calibration and scaling scheme for switched capacitor sigma-delta modulator
- Patent Title (中): 开关电容Σ-Δ调制器的2相增益校准和缩放方案
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Application No.: US12832599Application Date: 2010-07-08
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Publication No.: US08223053B2Publication Date: 2012-07-17
- Inventor: Philippe Deval , Vincent Quiquempoix
- Applicant: Philippe Deval , Vincent Quiquempoix
- Applicant Address: US AZ Chandler
- Assignee: Microchip Technology Incorporated
- Current Assignee: Microchip Technology Incorporated
- Current Assignee Address: US AZ Chandler
- Agency: King & Spalding L.L.P.
- Main IPC: H03M3/00
- IPC: H03M3/00

Abstract:
A sigma-delta modulator may have a plurality of capacitor pairs, a plurality of switches to couple any pair of capacitors from the plurality of capacitor pairs selectively to an input signal or a reference signal, and a control unit operable to control sampling through the switches to perform a charge transfer in two phases wherein any pair of capacitors can be selected to be assigned to the input signal or the reference signal, and wherein after a plurality of charge transfers a gain error cancellation is performed by rotating the capacitor pairs cyclically such that after a rotation cycle, each capacitor pair has been assigned a first predetermined number of times to the input signal, and has also been assigned a second predetermined number of times to the reference signal.
Public/Granted literature
- US20110012767A1 2-Phase Gain Calibration And Scaling Scheme For Switched Capacitor Sigma-Delta Modulator Public/Granted day:2011-01-20
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