Invention Grant
US08223053B2 2-phase gain calibration and scaling scheme for switched capacitor sigma-delta modulator 有权
开关电容Σ-Δ调制器的2相增益校准和缩放方案

2-phase gain calibration and scaling scheme for switched capacitor sigma-delta modulator
Abstract:
A sigma-delta modulator may have a plurality of capacitor pairs, a plurality of switches to couple any pair of capacitors from the plurality of capacitor pairs selectively to an input signal or a reference signal, and a control unit operable to control sampling through the switches to perform a charge transfer in two phases wherein any pair of capacitors can be selected to be assigned to the input signal or the reference signal, and wherein after a plurality of charge transfers a gain error cancellation is performed by rotating the capacitor pairs cyclically such that after a rotation cycle, each capacitor pair has been assigned a first predetermined number of times to the input signal, and has also been assigned a second predetermined number of times to the reference signal.
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