A phase change memory device includes a bitline biasing unit; and a bitline selection unit connecting a selected bitline to the bitline biasing unit and disconnecting deselected bitlines from the bitline biasing unit in an operative condition. A bitline discharge unit is connected to the bitlines to discharge leakage currents in the bitlines. The bitline discharge unit has a voltage regulation unit and a plurality of bitline discharge switches coupled between the voltage regulation unit and a respective bitline. The bitline discharge switches are controlled to connect the deselected bitlines to the voltage regulation unit and to disconnect the selected bitline from the voltage regulation unit. The voltage regulation unit comprises a PMOS transistor coupled between a regulated voltage bus and a reference potential line. The regulated voltage bus is connected to the bitline discharge switches and the control terminal of the PMOS transistor is biased to a constant voltage.