Invention Grant
- Patent Title: Non-volatile semiconductor memory, and the method thereof
- Patent Title (中): 非易失性半导体存储器及其方法
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Application No.: US12630539Application Date: 2009-12-03
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Publication No.: US08223541B2Publication Date: 2012-07-17
- Inventor: Riichiro Shirota
- Applicant: Riichiro Shirota
- Applicant Address: TW Hsinchu
- Assignee: Powerchip Technology Corporation
- Current Assignee: Powerchip Technology Corporation
- Current Assignee Address: TW Hsinchu
- Agency: Muncy, Geissler, Olds & Lowe, PLLC
- Priority: JP2008-309460 20081204
- Main IPC: G11C16/04
- IPC: G11C16/04

Abstract:
A non-volatile semiconductor memory and a writing method thereof are provided for preventing miswriting induced by gate-induced-drain leakage (GIDL). The non-volatile semiconductor memory comprises a non-volatile memory cell array 10 for recording multiple values by setting a plurality of different thresholds to each memory cell transistor that is connected in series between selection transistors Qs1 and Qs2 on two terminals of a selected bit line; and a control circuit 11 for controlling writing of the data from the memory cell array 10. The control circuit 11 records two values for at least a plurality of first memory cell transistors Q0, Q1, Q32 and Q33 respectively adjacent to the selection transistors Qs1 and Qs2 on two terminals of the bit line, and records more than three values for a plurality of second transistors Q2˜Q31 other than the first memory cell transistors.
Public/Granted literature
- US20100149870A1 NON-VOLATILE SEMICONDUCTOR MEMORY, AND THE METHOD THEREOF Public/Granted day:2010-06-17
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