Invention Grant
- Patent Title: Programming non-volatile memory with a reduced number of verify operations
- Patent Title (中): 用少量的验证操作编程非易失性存储器
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Application No.: US12625883Application Date: 2009-11-25
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Publication No.: US08223556B2Publication Date: 2012-07-17
- Inventor: Deepanshu Dutta , Gerrit Jan Hemink
- Applicant: Deepanshu Dutta , Gerrit Jan Hemink
- Applicant Address: US TX Plano
- Assignee: SanDisk Technologies Inc.
- Current Assignee: SanDisk Technologies Inc.
- Current Assignee Address: US TX Plano
- Agency: Vierra Magen Marcus & DeNiro LLP
- Main IPC: G11C16/06
- IPC: G11C16/06

Abstract:
A method and non-volatile storage system are provided in which programming speed is increased by reducing the number of verify operations, while maintaining a narrow threshold voltage distribution. A programming scheme performs a verify operation at an offset level, before a verify level of a target data state is reached, such as to slow down programming. However, it is not necessary to perform verify operations at both the offset and target levels at all times. In a first programming phase, verify operations are performed for a given data state only at the target verify level. In a second programming phase, verify operations are performed for offset and target verify levels. In a third programming phase, verify operations are again performed only at the target verify level. Transitions between phases can be predetermined, based on programming pulse number, or adaptive.
Public/Granted literature
- US20110122692A1 PROGRAMMING NON-VOLATILE MEMORY WITH A REDUCED NUMBER OF VERIFY OPERATIONS Public/Granted day:2011-05-26
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