Invention Grant
US08225184B2 Performing a cyclic redundancy checksum operation responsive to a user-level instruction 有权
响应于用户级指令执行循环冗余校验和操作

Performing a cyclic redundancy checksum operation responsive to a user-level instruction
Abstract:
In one embodiment, the present invention includes a method for receiving a user-level instruction for a checksum operation in a processor, where the user-level instruction specifies a source operand of a first size and a destination operand of a second size, receiving the source operand and the destination operand in the processor, and performing the checksum operation using the source operand and the destination operand in the processor responsive to the instruction. In an embodiment, the processor has multiple hardware engines that each can perform the checksum operation for one of multiple data sizes. Other embodiments are described and claimed.
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