Invention Grant
- Patent Title: Wiring design method for wiring board
- Patent Title (中): 接线板接线设计方法
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Application No.: US12563525Application Date: 2009-09-21
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Publication No.: US08225268B2Publication Date: 2012-07-17
- Inventor: Mikio Nakano
- Applicant: Mikio Nakano
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Knobbe Martens Olson & Bear LLP
- Priority: JP2009-44319 20090226
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
A wiring design method for a wiring board comprises, if design rule errors are found in the wiring design, selecting one of the design rule errors as a selected design rule error, specifying a predetermined number of the second connection terminals as selected second connection terminals that correspond to the selected design rule error, and moving the selected second connection terminals to predetermined coordinate positions. Each time when the selected second connection terminals are moved to the post-movement coordinate positions, the method comprises connecting the second connection terminals and the first connection terminals, conducting the design rule check, and determining whether no design rule errors are detected newly and the selected design rule error is not detected either.
Public/Granted literature
- US20100218151A1 WIRING DESIGN METHOD FOR WIRING BOARD Public/Granted day:2010-08-26
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