Invention Grant
- Patent Title: Template inspection method and manufacturing method for semiconductor device
- Patent Title (中): 半导体器件的模板检查方法和制造方法
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Application No.: US12553906Application Date: 2009-09-03
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Publication No.: US08227267B2Publication Date: 2012-07-24
- Inventor: Ikuo Yoneda , Tetsuro Nakasugi , Masamitsu Itoh , Ryoichi Inanami
- Applicant: Ikuo Yoneda , Tetsuro Nakasugi , Masamitsu Itoh , Ryoichi Inanami
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Finnegan, Henderson, Farabow, Garrett & Dunner, L.L.P.
- Priority: JP2008-245559 20080925
- Main IPC: H01L21/66
- IPC: H01L21/66

Abstract:
A template inspection method for performing defect inspection of a template, by bringing a pattern formation surface of a template used to form a pattern close to a first fluid coated on a flat substrate, filling the first fluid into a pattern of the template, and by performing optical observation of the template in a state that the first fluid is sandwiched between the template and the substrate, wherein a difference between an optical constant of the first fluid and an optical constant of the template is larger than a difference between an optical constant of air and the optical constant of the template.
Public/Granted literature
- US20100075443A1 TEMPLATE INSPECTION METHOD AND MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE Public/Granted day:2010-03-25
Information query
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