Invention Grant
- Patent Title: Via structure integrated in electronic substrate
- Patent Title (中): 集成在电子基板中的通孔结构
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Application No.: US12637104Application Date: 2009-12-14
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Publication No.: US08227708B2Publication Date: 2012-07-24
- Inventor: Xia Li , Wei Zhao , Yu Cao , Shiqun Gu , Seung H. Kang , Ming-Chu King
- Applicant: Xia Li , Wei Zhao , Yu Cao , Shiqun Gu , Seung H. Kang , Ming-Chu King
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agent Michelle Gallardo; Nicholas J. Pauley; Jonathan T. Velasco
- Main IPC: H05K1/11
- IPC: H05K1/11

Abstract:
A system of via structures disposed in a substrate. The system includes a first via structure that comprises an outer conductive layer, an inner insulating layer, and an inner conductive layer disposed in the substrate. The outer conductive layer separates the inner insulating layer and the substrate and the inner insulating layer separates the inner conductive layer and the outer conductive layer. A first signal of a first complementary pair passes through the inner conductive layer and a second signal of the first complementary pair passes through the outer conductive layer. In different embodiments, a method of forming a via structure in an electronic substrate is provided.
Public/Granted literature
- US20110139497A1 Via Structure Integrated in Electronic Substrate Public/Granted day:2011-06-16
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